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\newcommand\semester{Spring 2026}
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\newcommand\courseNum{ECE 2172}
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\newcommand\meetingDesc{MWF 8:30-9:20 in Drosdick 036}
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\newcommand\catalogDesc{Number systems (signed and unsigned), conversions, Binary arithmetic, digital logic design, both combinatorial and sequential, counters and state machines as well as learning VHDL (a hardware creation language) to implement the digital logic.}
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\newcommand\coReqs{Electrical \& Computer Engr 2173 Digital Systems Lab}
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\toprule
\large \textbf{Date} & \large \textbf{Topics}\\
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1/12 & Introduction\\
1/14 & Number systems and conversions\\
1/16 & Binary arithmetic, signed and unsigned numbers\\
1/19 & No class\\
1/21 & Basic gates\\
1/23 & Digital circuit operation\\
1/26 & Boolean algebra\\
1/28 & Boolean algebra cont.\\
1/30 & Combinatorial logic analysis and synthesis\\
2/2 & Combinatorial logic analysis and synthesis cont.\\
2/4 & Logic minimization\\
2/6 & Digital design flow and VHDL:basics\\
2/9 & VHDL: Concurrent Statements, Components and testbench\\
2/11 & MSI logic in VHDL\\
2/13 & Latch and flipflops\\
2/16 & Latch and flipflops pt 2\\
2/18 & Latches and Flipflops in VHDL\\
2/20 & Test 1 (up to VHDL material)\\
2/23 & sequential circuits and Timing diagrams\\
2/25 & sequential circuits and Timing diagrams pt 2.\\
2/27 & VHDL behavior modeling: process and Sequential statements\\
3/2 - 3/6 & SPRING BREAK\\
3/9 & VHDL behavior modeling: process and Sequential statements pt 2\\
3/11 & Counters\\
3/13 & Counters in VHDL\\
3/16 & Finite State Machines (FSM)\\
3/18 & FSM pt 2\\
3/20 & VHDL behavior modeling: FSM and Counters\\
3/23 & VHDL behavior modeling: FSM and Counters pt 2\\
3/25 & Test 2 review;\\
3/27 & Test 2 up to and including FSM but not in VHDL\\
4/1 & FSM Minimization pt 2.LAST DAY TO WX\\
4/6 & Test 2 up to FSM and Counters in VHDL\\
4/8 & Common Digital Logic Circuits\\
4/10 & Addition/Subtraction and Adders/Subtractors\\
4/13 & Carry Lookahead adders\\
4/15 & Carry Lookahead adders pt. 2\\
4/17 & EASTER  BREAK\\
4/20 & VHDL: Packages (selected)\\
4/22 & VHDL behavior modeling: RTL modeling\\
4/24 & Memory architecture and Non-volatile memory\\
4/27 & Quine McCluskey\\
4/29 & (Deemed a Friday) Quine McCluskey cont.\\
5/1 & Codes\\
5/4 & Exam Review\\
5/8 & Final Exam 2:30-5:00 pm Drosdick 036\\
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Tests 20\% each  \\
Homework 10\%  \\
Quizzes 20\%   \\
Final Examination 30\% \\
 
Note: The 10 highest quizzes will be used to determine your final grade. Since quizzes will be dropped, any missed quizzes will not be made up unless you have an excused absence.   Quizzes will be at the beginning of class on Fridays unless there is a holiday or test, in which case the quiz will be on Wednesday.
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Letter grade scale: A(93--100), A--(90--92), B+(87--89), B(83--86), B--(80--82), C+(77--79),\\
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Since you opted for an AI Policy, you should edit this part, choosing one of the following statements, modifying as desired:\\
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The use of AI-generated content is not permitted in this course.
Its use will result in an academic integrity violation and a zero on the assignment.\\
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OR\\
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The use of AI-generated content is allowed in this course.\\
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The use of AI-generated content is permitted as follows: (a) for generating a first draft or (b) for generating an outline or (c) for generating XXX.\\
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AND, if AI is allowed:\\
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