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Fall 2025
Aug 25, 2025
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Electrical \& Computer Engr

ECE 3170
Computer Architecture
Description:         Fundamentals of instruction set architecture (ISA) and processor \& memory organization. Topics include ISA, arithmetic circuits, register file, single-cycle, multi-cycle, and pipelined microarchitecture, memory operation, cache, virtual memory, parallel architectures.  3.00credit(s)
Restrictions:        Must be enrolled in one of the following Levels: Undergraduate
Corequisites:        ECE 3171
Prerequisites:       ECE 2170 and ECE 2172 and ECE 2173
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Release: 8.7.1.2

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References

1. file://localhost/htdocs/outlines/ECE-3170/catalog.html#main_content
2. file://localhost/wtlhelp/twbhhelp.htm
3. file://localhost/htdocs/outlines/ECE-3170/twbkwbis.P_Logout
4. file://localhost/pls/bannerprd/bvckctlg.p_display_courses?term_in=202620\&one_subj=ECE\&sel_subj=\&sel_crse_strt=3171\&sel_crse_end=3171\&sel_levl=\&sel_schd=\&sel_coll=\&sel_divs=\&sel_dept=\&sel_attr=
5. file://localhost/pls/bannerprd/bvckctlg.p_display_courses?term_in=202620\&one_subj=ECE\&sel_subj=\&sel_crse_strt=2170\&sel_crse_end=2170\&sel_levl=\&sel_schd=\&sel_coll=\&sel_divs=\&sel_dept=\&sel_attr=
6. file://localhost/pls/bannerprd/bvckctlg.p_display_courses?term_in=202620\&one_subj=ECE\&sel_subj=\&sel_crse_strt=2172\&sel_crse_end=2172\&sel_levl=\&sel_schd=\&sel_coll=\&sel_divs=\&sel_dept=\&sel_attr=
7. file://localhost/pls/bannerprd/bvckctlg.p_display_courses?term_in=202620\&one_subj=ECE\&sel_subj=\&sel_crse_strt=2173\&sel_crse_end=2173\&sel_levl=\&sel_schd=\&sel_coll=\&sel_divs=\&sel_dept=\&sel_attr=
8. javascript:history.go(-1)
9. file://localhost/pls/bannerprd/bvckctlg.p_disp_dyn_ctlg
10. file://localhost/pls/bannerprd/bwckctlg.xml
11. file://localhost/htdocs/outlines/ECE-3170/catalog.html#top