\setcounter{numTAs}{1}
\setcounter{totalSections}{2}
\def\secNum{{"001","002",""}}
\def\tenSchFileName{{"","",""}}
\def\classTime{{"Tuesday, Thursday 11:30 am to 12:45 pm","Monday, Wednesday 03:00 pm to 04:15 pm",""}}
\def\classRm{{"Tuesday (Chemical Engineering Building 204); Thursday (CEER 208)","Monday (Tolentine 405); Wednesday (CEER 208)",""}}
\def\classLive{{"","",""}}
\def\classInstructor{{"Jiafeng Xie","Jiafeng Xie",""}}
\def\classInstrContact{{"","",""}}
\def\classInstrOffHrs{{"Wednesday 1-3pm; zoom: https://villanova.zoom.us/j/5501866845","Wednesday 1-3pm; zoom: https://villanova.zoom.us/j/5501866845",""}}
\def\classInstrLive{{"","",""}}
\def\TA{{{"Pengzhou He",""},{"Pengzhou He",""},{""}}}
\def\TAEmail{{{"phe@villanova.edu",""},{"phe@villanova.edu",""},{""}}}
\def\TAOffHrs{{{"Wednesday 1-3pm; zoom: https://villanova.zoom.us/j/5501866845",""},{"Wednesday 1-3pm; zoom: https://villanova.zoom.us/j/5501866845",""},{""}}}
\def\TARoom{{{"",""},{"",""},{""}}}
\newcommand\semester{Fall 2021}
\newcommand\rsemester{202220}
\newcommand\courseNum{ECE 3430}
\newcommand\courseName{Embedded Systems II}
\newcommand\courseCoordinator{Jiafeng Xie}
\newcommand\credits{3}
\newcommand\contactHrs{3}
\newcommand\lecture{1}
\newcommand\lab{0}
\newcommand\undergradCourse{1}
\newcommand\isFreshmanCourse{0}
\newcommand\isCustomElecPolicy{0}
\newcommand\isClassLive{0}
\newcommand\isLabLive{0}
\newcommand\meetingMiscExists{0}
\newcommand\isClassInstrLive{0}
\newcommand\isLabInstrLive{0}
\newcommand\instrMiscExists{0}
\newcommand\hasTARoom{0}
\newcommand\meetingDesc{Example: (Two 75-minute lectures)}
\newcommand\meetingMisc{Special notes on meeting info go here, if specified}
\newcommand\instructorMisc{Special notes on instructor(s), TA(s) go here, if specified}
\newcommand\textBookExists{0}
\newcommand\textBookReqd{0}
\newcommand\textBookMiscExists{0}
\newcommand\referencesExist{1}
\newcommand\txtBkAuthExists{1}
\newcommand\txtBkPublExists{1}
\newcommand\txtBkYrExists{1}
\newcommand\txtBkISBNExists{1}
\newcommand\textBookTitle{Introduction to Logic Circuits & Logic Design with VHDL}
\newcommand\textBookAuth{Brock J. LaMeres}
\newcommand\textBookPub{Springer}
\newcommand\textBookYr{2019}
\newcommand\textBookISBN{978-3-030-12489-2}
\newcommand\supplMaterials{Brock J. LaMeres, Introduction to Logic Circuits \& Logic Design with VHDL, 2nd ed., Springer.}
\newcommand\refPapers{Go to Falvey Library Site and then search it. Then, you can download it.
}
\newcommand\textBookMisc{Special notes on textbook(s) go here, if specified}
\newcommand\catalogDesc{Digital logic families with primary emphasis on external electrical characteristics of the logic devices. Applications and designs at the board-level, involving topics such as series/parallel conversion and analog/digital conversion.}
\newcommand\preReqs{ECE 2430  and ECE 2431}
\newcommand\coReqs{None}
\newcommand\coreRequirement{Dedicated for understanding and applying digital design knowledge into practical hardware systems which can be modeled, designed, and implemented in specific FPGA platforms.}
\newcommand\courseExpectation{1.	To understand the properties of digital systems.
2.	To understand how to use computer-aided simulation tools to design, analyze and synthesize digital circuits.
3.	To understand how to prototype and troubleshoot simulation based designs to obtain desired synthesized performance through the CAD tool.
}
\newcommand\ABETOutOne{1}
\newcommand\ABETOutTwo{0}
\newcommand\ABETOutThree{1}
\newcommand\ABETOutFour{0}
\newcommand\ABETOutFive{0}
\newcommand\ABETOutSix{0}
\newcommand\ABETOutSeven{0}
\newcommand\covTopics{\item Combinational logic circuits
\item Sequential logic circuits
\item RTL modeling
\item Memory design
\item Programmable logic device
\item Computer arithmetic
\item Finite state machine
\item Serial/parallel and analog/digital conversion
\item Cryptographic circuits
\item Hardware design language coding}
\newcommand\isScheduleExternal{0}
\newcommand\isScheduleCommon{1}
\newcommand\scheduleRows{18}
\newcommand\scheduleCols{6}
\newcommand\scheduleHeight{1}
\newcommand\schedule{\begin{table}[h!] \centering 
\caption*{Tentative Schedule for \textbf{All Sections}} \vspace{0.05in}
{\renewcommand{\arraystretch}{1.5} \small
\begin{tabularx}{\linewidth}{l|l|l|l|l|l}
\toprule
\large \textbf{Month} & \large \textbf{Date} & \large \textbf{Course Topic} & \large \textbf{HW/Proj.} & \large \textbf{Quiz} & \large \textbf{Exam}\\
\midrule \midrule
August (week-1) & 23rd-27th & Background Review \& VHDL & \& HW1 &  & \\
Aug./Sep. (week-2) & 30th-3rd & Combinational Logic \& VHDL &  & \& Quiz 1 & \\
Sep. (week-3) & 7th-10th & Sequential Logic \& VHDL & HW2 \& Proj. 1 &  & \\
Sep. (week-4) & 13th-17th & Sequential Logic \& VHDL & HW3 \& Proj. 1 &  & \\
Sep. (week-5) & 20th-24th & Sequential Logic \& VHDL & HW4 \& Proj. 2 & Quiz 2 & \\
Sep./Oct. (week-6) & 27th-1st & RTL Modeling \& VHDL & HW5 \& Proj. 2 &  & \\
Oct. (week-7) & 4th-8th & Mid-term Review \& Exam &  &  & Mid-term\\
Oct. (week-8) & 11th-15th & Semester Recess &  &  & \\
Oct. (week-9) & 18th-22nd & Memory Design & HW6 \& Proj. 3 &  & \\
Qct. (week-10) & 25th-29th & Programmable Logic Device & HW7 \& Proj. 3 &  & \\
Nov. (week-11) & 1st-5th & Computer Arithmetic-I & HW8 \& Proj. 4 & Quiz 3 & \\
Nov. (week-12) & 8th-12th & Computer Arithmetic-II & HW9 \& Proj. 4 &  & \\
Nov. (week-13) & 15th-19th & Finite State Machine & HW10 \& Proj. 5 &  & \\
Nov. (week-14) & 22nd-23rd & Serial/Parallel Conversion & Proj. 5 &  & \\
Nov./Dec. (week-15) & 29th-3rd & Cryptographic Circuits & Proj. 5 &  & \\
Dec. (week-16) & 6th-9th & Final exam review \& project & Proj. 5 &  & \\
Dec. (week-17) & 13th-17th &  &  &  & Final exam\\
\bottomrule \end{tabularx} } \end{table}}
\newcommand\gradingPolicy{Your final grade will be determined from the following:

Attendance: 5\%

Homework*: 20\%

Quizzes**: 15\%

Lab report***: 35\% 

Mid-Term Exam****: 10\%

Final Exam*****: 15\%

There will be 5 times of attendance checks.

*: There will be 10 homework assignments (every 1-2 weeks). The detailed assignment schedule can be seen at the course schedule provided above.

Each homework will be 2 points.

Homework must be submitted to the Blackboard according to the designated timeline. LATE HOMEWORK WILL NOT BE ACCEPTED.  Your homework should be neat and with your full name on.

**: There will be 3 quizzes (every 2-3 weeks) in the beginning of the class. The detailed assignment schedule can be seen at the course schedule provided later.

Each quiz will be 5 points.

***: There will be 5 project assignments (each time gets 7 points). 
The report template is provided, see Blackboard.

****: Exam review will be provided and the schedule can be seen later. 

*****: Exam review (project and writing mixed) will be provided and the schedule can be seen later (probably December 6th).


Letter grade scale: A(93--100), A--(90--92), B+(87--89), B(83--86), B--(80--82), C+(77--79),\\
C(73--76), C--(70--72), D+(67--69), D(63--66), D--(60--62), F(<60)}
\newcommand\HWandLabPolicy{LATE HOMEWORK WILL NOT BE ACCEPTED.  Your homework should be neat and with your full name on it.

}
\newcommand\AttendancePolicy{\textcolor{red}{There will be 5 times of attendance checks.}}
\newcommand\ElectronicsPolicy{\textcolor{red}{Since you opted for a customize electronics policy, you should edit this part. Your policy should address your general stance on recording of class sessions and the circumstances under which recording will be allowed or prohibited. If you generally prohibit recording, yet allow recording of certain classes for some reason, then ypu should notify all students that those classes will be recorded. If recording is permitted as an ADA accommodation for a student, you obviously should not identify that student(s).)}}