\setcounter{numTAs}{0} \setcounter{totalSections}{1} \def\secNum{{"All",""}} \def\tenSchFileName{{"",""}} \def\classTime{{"M from 12:00 pm to 02:30 pm in Drosdick Hall 314.",""}} \def\classRm{{"Drosdick Hall 314",""}} \def\classLive{{"https://villanova.zoom.us/j/97027085390",""}} \def\classInstructor{{"X. Maggie Wang",""}} \def\classInstrContact{{"https://elearning.villanova.edu",""}} \def\classInstrOffHrs{{"W~1:30 PM - 3:00 PM (in person and on ZOOM)",""}} \def\classInstrLive{{"https://villanova.zoom.us/j/6105193830",""}} \def\TA{{{""},{""}}} \def\TAEmail{{{""},{""}}} \def\TAOffHrs{{{""},{""}}} \def\TARoom{{{""},{""}}} \newcommand\semester{Fall 2025} \newcommand\rsemester{202620} \newcommand\courseNum{ECE 8455} \newcommand\courseName{Advanced Digital Design Using FPGAs} \newcommand\courseCoordinator{X. Maggie Wang} \newcommand\credits{3} \newcommand\contactHrs{3} \newcommand\lecture{1} \newcommand\lab{0} \newcommand\undergradCourse{0} \newcommand\isFreshmanCourse{0} \newcommand\isCustomElecPolicy{0} \newcommand\AIPolicyExists{1} \newcommand\isClassLive{1} \newcommand\isLabLive{0} \newcommand\meetingMiscExists{0} \newcommand\isClassInstrLive{1} \newcommand\isLabInstrLive{0} \newcommand\instrMiscExists{0} \newcommand\hasTARoom{0} \newcommand\meetingDesc{} \newcommand\meetingMisc{} \newcommand\instructorMisc{Special notes on instructor(s), TA(s) go here, if specified} \newcommand\textBookExists{0} \newcommand\textBookReqd{0} \newcommand\textBookMiscExists{0} \newcommand\referencesExist{0} \newcommand\txtBkAuthExists{0} \newcommand\txtBkPublExists{0} \newcommand\txtBkYrExists{0} \newcommand\txtBkISBNExists{0} \newcommand\textBookTitle{} \newcommand\textBookAuth{} \newcommand\textBookPub{} \newcommand\textBookYr{} \newcommand\textBookISBN{} \newcommand\supplMaterials{I will integrate many materials from books, FPGA technical documentation, and research publications. Important references are posted in the references folder in the Blackboard. } \newcommand\refPapers{Technical documentation in the course References folder } \newcommand\textBookMisc{Special notes on textbook(s) go here, if specified} \newcommand\catalogDesc{Introduces students to advanced digital design and implementation for FPGAs (Field-Programmable Gate Arrays). Topics include VHDL \& Verilog, FPGA architectures, programming technologies, design methodologies, simulation and synthesis, place and route, and timing analysis, audio and video codec. An FPGA board and EDA tools are used to help students gain hands-on experience. Required background: Digital/logic design and VHDL basics.} \newcommand\preReqs{None} \newcommand\coReqs{None} \newcommand\coreRequirement{} \newcommand\courseExpectation{An FPGA (Field-Programmable Gate Array) device is a semi-custom integrated circuit (IC) that contains an array of programmable (configurable) logic blocks and programmable (configurable) interconnects that connect the logic blocks. FPGAs have undergone phenomenal advances in capacity and complexity during the past few years, and have transformed into most flexible and domain-specific platforms for many applications. Such advances, along with the skyrocketing costs of nano silicon processes and the ever-shrinking time-in-market window continue to successfully help FPGAs erode ASIC and ASSP market shares. The objective of this course is to introduce students to advanced digital design using VHDL/Verilog and implementation on FPGAs. Topics include FPGA architectures and design methodology, VHDL \& Verilog digital design fundamentals, RTL design, memory, digital audio and video design examples, ModelSim simulation, HDL coding techniques for optimizing synthesis results, FPGA power. An FPGA development board and EDA tools are used to help students gain hands-on experience. Prerequisite: Digital/logic design and VHDL basics.} \newcommand\ABETOutOneA{0} \newcommand\ABETOutOneB{0} \newcommand\ABETOutTwoA{0} \newcommand\ABETOutTwoB{0} \newcommand\ABETOutTwoC{0} \newcommand\ABETOutTwoD{0} \newcommand\ABETOutThree{0} \newcommand\ABETOutFourA{0} \newcommand\ABETOutFourB{0} \newcommand\ABETOutFourC{0} \newcommand\ABETOutFive{0} \newcommand\ABETOutSixA{0} \newcommand\ABETOutSixB{0} \newcommand\ABETOutSevenA{0} \newcommand\ABETOutSevenB{0} \newcommand\covTopics{\item \textcolor{blue}{\textbf{Please refer to the schedule of topics below.}}} \newcommand\isScheduleExternal{0} \newcommand\isScheduleCommon{1} \newcommand\scheduleRows{18} \newcommand\scheduleCols{2} \newcommand\scheduleHeight{1} \newcommand\schedule{\begin{table}[h!] \centering \caption*{Tentative Schedule for \textbf{All Sections}} \vspace{0.05in} {\renewcommand{\arraystretch}{1.5} \small \begin{tabularx}{\linewidth}{c|l} \toprule \large \textbf{Date} & \large \textbf{Topics}\\ \midrule \midrule 08/25 & Course Overview; Introduction to FPGAs\\ 09/08 & FPGA design methodology and tools; Quartus Prime Tutorial 1\\ 09/15 & VHDL digital hardware modeling basics\\ 09/22 & Introduction to Verilog\\ 09/29 & Sequential circuits modeling; Tutorial: ModelSim basic simulation\\ 10/06 & RTL digital design and state machines\\ 10/13 & \textcolor{blue}{Fall Break}\\ 10/20 & Testbench; Memory designs for FPGA-based systems; Tutorial: Advanced ModelSim simulation\\ 10/27 & Design Example: Audio codec\\ 11/03 & Lab time for project help\\ 11/10 & Digital video (VGA)\\ 11/17 & Synthesis optimizations\\ 11/24 & FPGA power and timing\\ 12/01 & \textcolor{red}{Project Presentations}\\ 12/08 & \textcolor{red}{Final Exam}\\ 12/15 & Project report due; no class meeting\\ & \\ \bottomrule \end{tabularx} } \end{table}} \newcommand\gradingPolicy{1. Homework Assignments -- 50\% 2. Exam -- 20\% 3. Project: 30\% (Proposal 5\%; presentation: 7\%; Technical design: 18%) Letter grade scale: A(94--100), A--(90--93), B+(87--89), B(83--86), B--(78--82), C+(74--77),\\ C(70--73), F(<70)} \newcommand\HWandLabPolicy{Weekly homework assignments will be posted in the Blackboard Assignments folder and due the following week, unless announced otherwise. The project assignment can be found in the same folder. Learning how to look for appropriate technical documentation, read and understand them efficiently in a focused manner is one of the essential engineering skills, and one of the objectives of the course. You are expected to develop debug skills through vendor’s technical documentation and discussion forums when you have questions and problems with the assignments and project. In addition to the lecture slides and tutorials, additional reading assignments will be posted in the Blackboard References folder as needed.} \newcommand\AIPolicy{\textcolor{red}{ The use of AI-generated content is not permitted for credit in this course. Its use will result in an academic integrity violation and a zero on the assignment.}\\ } \newcommand\AttendancePolicy{\textcolor{blue}{You are expected to attend all the class meetings and are responsible for all the material covered in class including handouts and class notes. }} \newcommand\ElectronicsPolicy{\textcolor{red}{Since you opted for a customize electronics policy, you should edit this part. Your policy should address your general stance on recording of class sessions and the circumstances under which recording will be allowed or prohibited. If you generally prohibit recording, yet allow recording of certain classes for some reason, then ypu should notify all students that those classes will be recorded. If recording is permitted as an ADA accommodation for a student, you obviously should not identify that student(s).)}}